Implementation and Measurement of 9-bit Vedio Digital-to-Aanlog Converter Integrated Circuit Design
碩士 === 國立臺灣科技大學 === 電子工程技術研究所 === 86 === A video 9 bits D/A converter has been fabricated in a 0.6um single-poly triple-metal CMOS technology. In order to achieve high accuracy, a current-cell matrix configulation, a switching technique named "Hierarchical symmetrical switching"...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
1998
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| Online Access: | http://ndltd.ncl.edu.tw/handle/24717178790137680364 |
| Summary: | 碩士 === 國立臺灣科技大學 === 電子工程技術研究所 === 86 === A video 9 bits D/A converter has been fabricated in a 0.6um single-poly triple-metal CMOS technology. In order to achieve high accuracy, a current-cell matrix configulation, a switching technique named "Hierarchical symmetrical switching"and a balanced reference current source design had been used. P-channel deviceused as current source ensure a ground-referenced voltage output. The chip sizeof video DAC is 1.8mm x 1.8mm(0.9mm x 0.9mm for DAC portion). The video DAC is operated by a single 5V power supply.
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