Approach to Reconfiguring Bus by Using Triangular Processor Arrays

• Main Authors: Lee, Ming Fung, 李銘芳
• Other Authors: Hsuan Wei Huang
• Format: Others
• Language: zh-TW
• Published: 1998
• Online Access: http://ndltd.ncl.edu.tw/handle/26223976175716630501

碩士 === 國立海洋大學 === 電機工程學系 === 86 === To the world of today, computer network have become the best place where many people get information. But the transmission speed on the network has not been up to the expectation. Nevertheless, the concentrator is one kind of the important devices, which may save the number of unnecessary channels and increase the transmission efficiency of the network. On the other hand, sorting is practically important and theoretically interesting problems in computer science. There are many sequential sorting algorithms are available in the literatures and it is well known that the best case of sorting complexity is Ο（n log n）. In this paper, the model is proposed by using the triangular processor array with reconfigurable bus of parallel systems. A reconfigurable bus system is a bus system whose configuration is dynamically changeable. In using the reconfigurable bus system and the CRCW PRAM ( Concurrent-Read Concurrent-Write Parallel Random Access Machine ) techniques, the complexity of sorting and the routing time of concentrator can be solved in Ο（1） time.