Performance-Driven Placement and Routing Refinement for Virtual- Wire-Based Hardware Emulation
碩士 === 國立清華大學 === 資訊工程學系 === 86 === A hardware emulator consists of multiple FPGAs interconnected to emulatethe given design circuit. The biggest problem with hardware emulator is that the logic utilization for each FPGA is rather low due...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1998
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| Online Access: | http://ndltd.ncl.edu.tw/handle/98475322893146882960 |