A CAD Tool for Optimal Fixed-point VLSI Structure of a Floating- point Based Digital Filter Design

• Main Authors: Huang, Kuo-Fuo, 黃國富
• Other Authors: Wu An-Yeu
• Format: Others
• Language: zh-TW
• Published: 1998
• Online Access: http://ndltd.ncl.edu.tw/handle/48915573216138601669

碩士 === 國立中央大學 === 電機工程學系 === 86 === One of the major tasks of a system IC designer is to determine the VLSI architecture and assign wordlength for a given DSP design.However, there is still no known good CAD tools that can help thedesigners to determine these two design issues automatically.In this thesis, we develop a knowledge-based CAD tool to assistsystem IC designers with the fixed-point implementation of a prescribeddigital filter. The tool can analyze the finite-precision behaviorfor a given floating-point based filter design. Based onthe analytical results, the tool can suggest most suitablefilter structure, wordlength assignment, and scaling operation to realizethe filter. It will also estimate the hardware cost of theresulting VLSI architecture. Therefore, the designer can simply pick up themost cost-efficient VLSI implementation of the target filter without goingthrough tedious fixed-point analysis.