Analog Front-End Architecture and Circuit Design Techniques for High Speed Communication VLSIs

• Main Authors: Huang, Po-Chiun, 黃柏鈞
• Other Authors: Chorng-Kuang Wang
• Format: Others
• Language: zh-TW
• Published: 1998
• Online Access: http://ndltd.ncl.edu.tw/handle/24503479361882897177

博士 === 國立中央大學 === 電機工程學系 === 86 === There are distinct applications between the wired and wireless communication systems. A Wired broadband system service demands a high-speed data rate transmission; a wireless system, however, wide coverage range is necessary in order to provide facile access service. With the rapid progress of digital signal processing, many complicate modulation and demodulation schemes can be realized by modern VLSI technology. However, the circuit and architecture approaches for analog-front-end functions are still not cost and power effective. This thesis therefore concentrates on low voltage high-peed circuit and architecture techniques for various function blocks, namely, signal amplification, amplitude equalization, and frequency translation in the analog-front-end. In signal application, high-speed amplifiers are proposed for wired and wireless system applications. As to the magnitude control, low voltage, high-speed circuit techniques, VLSI architectures, and sub-system design methodology are proposed for limiting and AGC approaches. Polyphase system is investigated for the quadrature phase shifting application in the RF frequency translation function. Circuit techniques explored are employed to realize some analog functions blocks and subsystems using scaled CMOS technology in order to access the feasibility and practicability. Wideband circuits implemented in CMOS submicrometer technology are for hundreds megahertz broadband and gigahertz RF wireless systems. Two magnitude control functions, namely, limiting amplifier and AGC, are implemented further in 0.5um CMOS technology for optical fiber systems SONET OC-3 and OC- 12. Functions involved in these two magnitude controls are variable gain amplifier, magnitude detection circuits, and offset subtraction circuits, which are to operate up to several hundreds megahertz. For the polyphase system, a 2.4GHz polyphase quadrature phase shifter circuits are designed using CMOS 0.35um technology. It is believed that the architecture and circuit proposed can be applied to high speed analog front-end functions of other applications. The techniques aggregated in this thesis pave the way for imminent low-cost, high-integrated communication system VLSIs.