The Design and Analysis of A 2.4-GHz CMOS Low Noise Amplifier

• Main Authors: Hsieh, Yi-Bin, 謝義濱
• Other Authors: Kao Yao-Huang
• Format: Others
• Language: zh-TW
• Published: 1998
• Online Access: http://ndltd.ncl.edu.tw/handle/52438432440573781240

碩士 === 國立交通大學 === 電信工程研究所 === 86 === Recently, RF integrated circuit design based on CMOS technology has receivedmuch attention owing to the low cost, high integrability, and maturity. Low noise amplifier(LNA) is the important element in the receiver for good sensitivity. In this thesis, a single-ended 2.4GHz CMOS LNA is designed and fabricated with cascoded source inductive feedback(SIF) topology. An optimum noise performance and inputmatching is examined to be simultaneously achieved using this topology. The simulation result gets a NF of 2.9dB, a gain of 20dB at 2.4GHz, and a P-1dB compression point referred to input of -28dBm. Integrated planar inductor has the advantage not only size reduction for band selection but also for optimum noise measure. While the inductance and the related Q value are limited and are not easily predicted because of the mutual coupling andresistive Si substrate. This problem is overcome through using the full- wave EM simulation. It is indicated that the quality factor Q has been improved up to 50%.Thesimulation results are verified to be closely to those by measurement. The error between the simulation and the measurement are within 10-15%.