Interconnection Crosstalk Minimization In Submicro VLSI Design

Interconnection Crosstalk Minimization In Submicro VLSI Design

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碩士 === 國立成功大學 === 電機工程學系 === 86 ===

Bibliographic Details
Main Authors: Shieh, Wu-Chien, 謝武見
Other Authors: Yen-Tai Lai
Format: Others
Language:zh-TW
Published: 1998
Online Access:http://ndltd.ncl.edu.tw/handle/63213804117877483676
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spelling ndltd-TW-086NCKU14420742015-10-13T11:06:13Z http://ndltd.ncl.edu.tw/handle/63213804117877483676 Interconnection Crosstalk Minimization In Submicro VLSI Design 深次微米超大型積體電路之干擾最小化 Shieh, Wu-Chien 謝武見 碩士 國立成功大學 電機工程學系 86 Yen-Tai Lai 賴源泰 1998 學位論文 ; thesis 56 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 國立成功大學 === 電機工程學系 === 86 ===
author2 Yen-Tai Lai
author_facet Yen-Tai Lai
Shieh, Wu-Chien
謝武見
author Shieh, Wu-Chien
謝武見
spellingShingle Shieh, Wu-Chien
謝武見
Interconnection Crosstalk Minimization In Submicro VLSI Design
author_sort Shieh, Wu-Chien
title Interconnection Crosstalk Minimization In Submicro VLSI Design
title_short Interconnection Crosstalk Minimization In Submicro VLSI Design
title_full Interconnection Crosstalk Minimization In Submicro VLSI Design
title_fullStr Interconnection Crosstalk Minimization In Submicro VLSI Design
title_full_unstemmed Interconnection Crosstalk Minimization In Submicro VLSI Design
title_sort interconnection crosstalk minimization in submicro vlsi design
publishDate 1998
url http://ndltd.ncl.edu.tw/handle/63213804117877483676
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AT xièwǔjiàn shēncìwēimǐchāodàxíngjītǐdiànlùzhīgànrǎozuìxiǎohuà
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