Instruction Array Architecture
碩士 === 逢甲大學 === 資訊工程學系 === 86 === This paper describes a novel processor architecture, called Instruction Array Architecture, which encompasses the characters of superscalar and VLIW architecture. In brief, an instruction array machine plac...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1998
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| Online Access: | http://ndltd.ncl.edu.tw/handle/65786416493785378758 |
| Summary: | 碩士 === 逢甲大學 === 資訊工程學系 === 86 === This paper describes a novel processor architecture, called
Instruction Array Architecture, which encompasses the characters
of superscalar and VLIW architecture. In brief, an instruction
array machine places instructions as an array in main memory. In
this way the disadvantages of superscalar and VLIW architecture
can be resolved. The goal of instruction array architecture is
to resolve the problem of fetching instructions in superscalar
architecture and that of scalability in VLIW architecture. The
suppor
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