A Study of Lot Priority Setting for Wafer Fabrication Factories

• Main Authors: Jeng Jyh-chuang, 鄭智強
• Other Authors: James C. Chen
• Format: Others
• Language: zh-TW
• Published: 1998
• Online Access: http://ndltd.ncl.edu.tw/handle/56648236294791104852

碩士 === 中原大學 === 工業工程研究所 === 86 === Semiconductor manufacturing in Taiwan is growing very fast. In addition to the development in products and manufactoring technologies,operation managenment such as scheduling and dispatching is one way forthe IC fabs to become competitive in the world market. In this research, the effect of lot priority distribution on cycle time and wafer in process is studied. Lots are classified into five groups: super hot, hot, rush, normal, and slow. Lot priority can be determined in both static and dynamic way. In static way, lot priority is set when the lot is release to the fab and the lot uses this priority through the process.In dynamic way, the slack of each lot is calculated daily and the priorityof each lot is dynamically determened accordingly. AutoSched simulation models are built to evaluate the performanceof different lot priority distribution policies. A foundry fab with fivemajor product types each consisting of 300 steps is studied. Simulationresults show lot priority distribution significantly affects cycle time andwafer in process. A dynamic priority distribution of 4% super hot, 16% hot,16% rush, 32% normal, and 32% slow leads to the best overall performance.