ATM Based Circuit Emulation Design For ATM VP Add/Drop Multiplexer
碩士 === 國立中正大學 === 電機工程學系 === 86 === Abstract In SONET/SDH network, add/drop multiplexer (ADM) is a key network element. It drops several sub-channels of a high- speed link as outputs of low-speed links, and adds up to the same number of sub...
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ndltd-TW-086CCU004420122016-01-22T04:17:30Z http://ndltd.ncl.edu.tw/handle/97167957378845809568 ATM Based Circuit Emulation Design For ATM VP Add/Drop Multiplexer 非同步傳輸模式之通路模擬設計 Her, Cheng-Yio 何政祐 碩士 國立中正大學 電機工程學系 86 Abstract In SONET/SDH network, add/drop multiplexer (ADM) is a key network element. It drops several sub-channels of a high- speed link as outputs of low-speed links, and adds up to the same number of sub-channels to the high-speed link from the inputs of the low-speed links. Asynchronous Transfer Mode (ATM) is a new transfer technology, which combines the advantages of circuit-switching and flexibility of packet-switching. It is possible for ATM to transmit almost all kinds of services. To use ATM as the backbone network of transmission, it must be support existing circuit-switched services. For constant bit rate (CBR) service with delay constraint, ATM adaptation layer type 1 (AAL1) is used to transmit asynchronous digital signals from plesiosynchronous digital hierarchy (PDH). It is called circuit emulation to transport an asynchronous digital through ATM network. With ATM transport technology and adaptation of AAL1, an ATM ADM similar to SONET/SDH ADM is designed. In SONET/ SDH ADM, each sub-channel is byte-multiplexed with regards to reference position to SONET/SDH transmission framing. In ATM ADM, although its physical medium is based on SONET/SDH, each sub-channel, termed virtual channel in ATM, is a cell- multiplexed with a label in the cell header to indicate the connection. The cell is self-supported, so there is no TSI problem. In the design, there are four high-speed 155.52 MHz STM-1/STS-3c link called SO150. SO150 can add/drop up to 64 lines of E1 signal (2048KHz). There are 16 CE2 boards each handling 4 E1 tributaries for circuit emulation. The SCU board is designed for control and management functions. The minimal ATM ADM system can be built for system integration and testing. Kuo-Tan Wu 吳國棟 1998 學位論文 ; thesis 61 zh-TW |
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碩士 === 國立中正大學 === 電機工程學系 === 86 === Abstract In SONET/SDH network, add/drop multiplexer (ADM) is a
key network element. It drops several sub-channels of a high-
speed link as outputs of low-speed links, and adds up to the
same number of sub-channels to the high-speed link from the
inputs of the low-speed links. Asynchronous Transfer Mode (ATM)
is a new transfer technology, which combines the advantages of
circuit-switching and flexibility of packet-switching. It is
possible for ATM to transmit almost all kinds of services. To
use ATM as the backbone network of transmission, it must be
support existing circuit-switched services. For constant bit
rate (CBR) service with delay constraint, ATM adaptation layer
type 1 (AAL1) is used to transmit asynchronous digital signals
from plesiosynchronous digital hierarchy (PDH). It is called
circuit emulation to transport an asynchronous digital through
ATM network. With ATM transport technology and adaptation of
AAL1, an ATM ADM similar to SONET/SDH ADM is designed. In SONET/
SDH ADM, each sub-channel is byte-multiplexed with regards to
reference position to SONET/SDH transmission framing. In ATM
ADM, although its physical medium is based on SONET/SDH, each
sub-channel, termed virtual channel in ATM, is a cell-
multiplexed with a label in the cell header to indicate the
connection. The cell is self-supported, so there is no TSI
problem. In the design, there are four high-speed 155.52 MHz
STM-1/STS-3c link called SO150. SO150 can add/drop up to 64
lines of E1 signal (2048KHz). There are 16 CE2 boards each
handling 4 E1 tributaries for circuit emulation. The SCU board
is designed for control and management functions. The minimal
ATM ADM system can be built for system integration and testing.
|
author2 |
Kuo-Tan Wu |
author_facet |
Kuo-Tan Wu Her, Cheng-Yio 何政祐 |
author |
Her, Cheng-Yio 何政祐 |
spellingShingle |
Her, Cheng-Yio 何政祐 ATM Based Circuit Emulation Design For ATM VP Add/Drop Multiplexer |
author_sort |
Her, Cheng-Yio |
title |
ATM Based Circuit Emulation Design For ATM VP Add/Drop Multiplexer |
title_short |
ATM Based Circuit Emulation Design For ATM VP Add/Drop Multiplexer |
title_full |
ATM Based Circuit Emulation Design For ATM VP Add/Drop Multiplexer |
title_fullStr |
ATM Based Circuit Emulation Design For ATM VP Add/Drop Multiplexer |
title_full_unstemmed |
ATM Based Circuit Emulation Design For ATM VP Add/Drop Multiplexer |
title_sort |
atm based circuit emulation design for atm vp add/drop multiplexer |
publishDate |
1998 |
url |
http://ndltd.ncl.edu.tw/handle/97167957378845809568 |
work_keys_str_mv |
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