| Summary: | 碩士 === 國立臺灣大學 === 電機工程學系 === 85 === This thesis develops an original compaction scheme
specifically for MCMs that provides a more compact routing
system and consequently reduces total chip area. This design
will hereafter be known as "the Ant Lion Scheme." The goal of
the Ant Lion is to provide a chip that at once maximizes
convergence, effectiveness, and efficiency. Through
convergence, the layout of a chip contracts toward the imaginary
center of gravity of the chip. Effectiveness guarantees that
the Ant Lion simultaneously maximizes on compaction and abides
by all relevant design specifications. Through Ant Lion,
unnecessary tile movement is eliminated as Ant Lion jumps
directly to the next necessary tile without scrolling through
each tile one by one. This is efficiency. Towards exacting
this triple-pronged objective, this thesis proposes three
processing, two compaction, and two patching algorithms.
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