| Summary: | 碩士 === 國立臺灣大學 === 電機工程學系 === 85 === To take full advantage of the increased speed and density of
VLSI circuits, multichip modules ( MCMs ) have been developed to
reduce signal delay, power requirements, and the physical size
of electronic systems. However, as more chips are placed in the
same package, the line density will greatly increase. This can
result in serious signal distortions. In order to ensure the
performance of an MCM-based system, the interconnections between
bare chips must be designed carefully.
In this thesis, we develop a dedicated simulation system to
analyze MCM interconnection networks and help the package
designers to find the optimal design. This simulation system
consists of three parts, namely, parameter calculator, circuit
simulator, and circuit optimizer. The parameter calculator
evaluates the transmission-line parameters of interconnections.
These parameters are fed into the circuit simulator to determine
the time-domain response of an MCM interconnection network. If
the circuit responsdoes not satisfy the performance
specifications, the circuit optimizer can help us to find the
optimalhe simulation results are also compared with the results
from empirical formulas, references and another circuit
simulator, HSPICE. Very good agreement is observed.
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