IC Architecture Designs for Suboptimum Decoders of Convolutional Codes
博士 === 國立臺灣大學 === 電機工程學系 === 85 === In this thesis,we implement integrated circuit(IC) architecture designs of modified Viterbi decoder for convolutional codes.Base ontwo modified Viterbi algorithms,we implement IC architecture designsfor two decoders wit...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
1997
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| Online Access: | http://ndltd.ncl.edu.tw/handle/58915709859048756138 |