IC Architecture Designs for Suboptimum Decoders of Convolutional Codes

• Main Authors: Chan, Ming-Hwa, 詹明華
• Other Authors: Mao-Chao Lin
• Format: Others
• Language: zh-TW
• Published: 1997
• Online Access: http://ndltd.ncl.edu.tw/handle/58915709859048756138

博士 === 國立臺灣大學 === 電機工程學系 === 85 === In this thesis,we implement integrated circuit(IC) architecture designs of modified Viterbi decoder for convolutional codes.Base ontwo modified Viterbi algorithms,we implement IC architecture designsfor two decoders with soft decision.One of the decoders is based ona modified t-algorithm. The advantages of such a decoder is that thedecoding speed can be increased and the energy dissipation can be decreased without sacrifice the error performance.The other is a suboptimum version of the Viterbi decoder for a special class ofconvolutional codes with a very long constraint length.The advantages of the decoder is that the power dissipation and circuit area can be greatly decreased while the decoding error rate is very low.