Complete Interconnect BIST Using IEEE 1149 Boundary Scan

碩士 === 國立中央大學 === 電機工程學系 === 85 === In this paper, we will present a BIST methodology for board and system levels interconnect based on IEEE 1149.1 and IEEE 1149.5 Boundary Scan standards. We target at systems with optional cards. We will p...

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Bibliographic Details
Main Authors:	Jane, Shaing-Wang, 鄭香旺
Other Authors:	Chauchin Su
Format:	Others
Language:	zh-TW
Published:	1997
Online Access:	http://ndltd.ncl.edu.tw/handle/95648108283267675920

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spelling	ndltd-TW-085NCU004420172015-10-13T17:59:41Z http://ndltd.ncl.edu.tw/handle/95648108283267675920 Complete Interconnect BIST Using IEEE 1149 Boundary Scan 用邊界掃描完整內建式自我測試內部連線 Jane, Shaing-Wang 鄭香旺碩士國立中央大學電機工程學系 85 In this paper, we will present a BIST methodology for board and system levels interconnect based on IEEE 1149.1 and IEEE 1149.5 Boundary Scan standards. We target at systems with optional cards. We will proposed an algorithm that is able to generate suitable test pattern for dynamic option card environment.The system test flow is composed of tests for scan paths, intra/ inter nets, and backplane net. To verify our algorithm, we will present the hardware emulator to emulate the proposed test methodology in IEEE 1149.5 and IEEE 1149.1 environments. Chauchin Su 蘇朝琴 1997 學位論文 ; thesis 59 zh-TW
collection	NDLTD
language	zh-TW
format	Others
sources	NDLTD
description	碩士 === 國立中央大學 === 電機工程學系 === 85 === In this paper, we will present a BIST methodology for board and system levels interconnect based on IEEE 1149.1 and IEEE 1149.5 Boundary Scan standards. We target at systems with optional cards. We will proposed an algorithm that is able to generate suitable test pattern for dynamic option card environment.The system test flow is composed of tests for scan paths, intra/ inter nets, and backplane net. To verify our algorithm, we will present the hardware emulator to emulate the proposed test methodology in IEEE 1149.5 and IEEE 1149.1 environments.
author2	Chauchin Su
author_facet	Chauchin Su Jane, Shaing-Wang 鄭香旺
author	Jane, Shaing-Wang 鄭香旺
spellingShingle	Jane, Shaing-Wang 鄭香旺 Complete Interconnect BIST Using IEEE 1149 Boundary Scan
author_sort	Jane, Shaing-Wang
title	Complete Interconnect BIST Using IEEE 1149 Boundary Scan
title_short	Complete Interconnect BIST Using IEEE 1149 Boundary Scan
title_full	Complete Interconnect BIST Using IEEE 1149 Boundary Scan
title_fullStr	Complete Interconnect BIST Using IEEE 1149 Boundary Scan
title_full_unstemmed	Complete Interconnect BIST Using IEEE 1149 Boundary Scan
title_sort	complete interconnect bist using ieee 1149 boundary scan
publishDate	1997
url	http://ndltd.ncl.edu.tw/handle/95648108283267675920
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Complete Interconnect BIST Using IEEE 1149 Boundary Scan

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