A Simple Method for Shielding Parasitic Modes in A Waveguide- Packaged Microstrip Line Circuit

• Main Authors: Wang, Chun-Long, 王蒼容
• Other Authors: Shyh-Jong Chung
• Format: Others
• Language: zh-TW
• Published: 1997
• Online Access: http://ndltd.ncl.edu.tw/handle/66981588480735019833

碩士 === 國立交通大學 === 電信研究所 === 85 === A simple structure formed by two metal patches symmetrically deposit- ed at the two sides of the center microstrip is proposed and analyzed for shielding the higher- order modes in a waveguide-packaged micro- strip line circuit. Two packaging waveguide sizes were considered and compared. The variations (with the patch width) of the effective die- lectric constants and field distributions, of the modes in the pack- aged microstrip line with infinitely long side patches, were first investigated using the 2-D finite element method and the method of lines. The results suggested that there exists a range of patch width at which the field distributions of the higher-order modes are total- ly different from those of the microstrip line without side patches. The scattering of the patches, as a function of the patch length and width, was then studied using the 3-D finite element method with edge elements. It has been found that, by simply choosing appropriate patch sizes, the parasitic higher-order modes can completely shielded without sacrificing the normal propagation of the dominant mode.