Study on Low Dielectric Material
碩士 === 國立交通大學 === 電子工程學系 === 85 === Interconnect delay is a performance-liming factor for ULSI circuits when feature size is scaled into the deep submicron region. Using low dielectric constant material for the interlayer insulator...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
1997
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Online Access: | http://ndltd.ncl.edu.tw/handle/38357300387503988385 |