| Summary: | 碩士 === 國立交通大學 === 工業工程與管理學系 === 85 === In integrated circuit (IC) manufacturing, a wafer''s defects tend
to cluster. As the wafer size increases, the clustering
phenomenon of the defects becomes increasingly apparent.When the
conventional Poisson yield model is used, the clustered defects
frequently cause false results. In this study, we propose a
neural network-based modified Poisson yield model to predict the
wafer yield in IC manufacturing. The proposed approach can
reduce the phenomenon of the false predictions caused by the
clustered defects. A case study is also presented, demonstrating
the effectiveness of the proposed approach.Keywords: integrated
circuit, defects, cluster, yield model, neural network
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