The Application of Group Technology to IC Fab Design
碩士 === 中原大學 === 工業工程學系 === 85 === Current IC fab layout may have the following disadvantages: high work-in-process (WIP) level, long wafer move distance, and high utilization of interbay automated material handling system (AMHS). Improvement in the fab design can reduce WIP level, decrease wafer mov...
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| Format: | Others |
| Language: | zh-TW |
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1997
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| Online Access: | http://ndltd.ncl.edu.tw/handle/68698636308284043532 |