Performance Analysis of Code Tracking Loops in the Presence of Gain and Phase Imbalance

• Main Authors: Chung, Mou-Chih, 鍾謀智
• Other Authors: Jeich Mar
• Format: Others
• Language: zh-TW
• Online Access: http://ndltd.ncl.edu.tw/handle/64781843898022375790

碩士 === 元智工學院 === 電機與資訊工程研究所 === 84 === In the thesis, the performance of code tracking loops in direct- sequence spread-spectrum communication systems are analyzed for the presence of gain and phase imbalance. The gain and phase imbalance will cause a dc bias error for S-curve of Delay Lock Loop(DLL) and Sum/Difference Loop(SDL). The renewal process approach(RPA) is used to obtain a exact nonlinear analysis for both loops. The effects of gain and phase imbalance are evaluated in terms of the mean-time-to-lose-lock(MTLL) and root- mean-square(rms) tracking error. It is assumed that the code acquisition boundaries are equal to the branch offset of the loop in the analysis. The analysis results show that the phase imbalance will not generate the dc bias error for DLL. If the branch offset of SDL is ≧ 0.5 with equal gain for both loop branches, the dc bias error will remain a constant for difference values of input data SNR, and its values will decreased with increasing branch offset. For both tracking loops, a smaller value of branch offset will result in smaller tracking error and MTLL; easily make out of work under the gain and phase imbalance; the effects of gain and phase imbalance are more significant for both tracking loops that have larger loop SNR and branch offset. The larger gain existed in either advance or delay arms of SDL will make different effect on the performance of the loop with gain and phase imbalance.