Summary: | 碩士 === 國立中央大學 === 電機工程研究所 === 84 ===
H.261 family provides very efficient coding schemes and is the most popular standard for video conferences. It is desirable to have a softwareonly codec which is implemented on a PC, a DSP, or a microcontroller system. In this work, we implement H.261 on winbond W89K PA-RISC processor. The goal is to achieve the best performance in terms of the frame rate with acceptable quality.
We speed up the codec from two different aspects, algorithms and programming. H.261 employs a lot of computation intensive operations, such as motion compensation, motion estimation, DCT, IDCT and color conversion. We use PHODS (parallel hierarchical one-dimension search) to perform motion estimation along X-Y directions. The DCT and quantization are combined in one procedure to reduce overhead and scaled 1-dimension DCT is used. For displaying the decompressed video, we use 256 colors with 4-2-2 bits for Y-Cb-Cr with ordered dithering. On the programming side, we flatten the code to reduce the number of procedure calls and routines. We also perform "strength reduction" such as replacing multiplications by simple "shift-and-add" operation and table lookups.
A 150-frame QCIF (176×144) video source Suzie is used to test the codec. Q-factor is chosen as 8 in all experiments. The results reach 7 frames/second at encoder and 12 frame/second at the decoder with bitrate 178 Kbps (normalized by 30 fps) and PSNR 35.04 dB. The video quality is acceptable and it has the advantage of no extra cost on hardwarre. Thus far, we only work on W89K processor. Most of approaches, however, can be applied to others processors and improve the speed significantly.
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