A Study of Dispatching Rules for Photolithography Area in Wafer Fabrication Factories

• Main Authors: Hsu, Kuang-Hung, 徐光宏
• Other Authors: Ching-En Lee
• Format: Others
• Language: zh-TW
• Published: 1996
• Online Access: http://ndltd.ncl.edu.tw/handle/94810580675366169192

碩士 === 國立交通大學 === 工業工程研究所 === 84 === The major objective of this research is to develop a general dispatchingmodel for the photolithography area, bottleneck area, in the wafer fabricationfactory. This research first analyzes the manufacturing process and machinecharacteristics in wafer fabrication to find out the important factors whichinfluence on the performance the most in the photolithography area as well asthe entire factory. By carefully considering these factors, a dispatchingmodel, PADR, for machines in the photolithography area is developed. In this research, an AUTOSCHED simulation model for a real world factory isconstructed and the corresponding statistical hypotheses testing is designedso that the significance of the above factors to the system performance can beanalyzed and finally different dispatching strategies under different mixed ofsystem properties for the photolithography area can be derived. The simulationresults indicate that PADR can effectively balance load, reduce average cycletime and waiting time, and increase throughput rate. Also, larger improvementscome from input contorl policy than from dispatching rule, in particular, FW(Fixed-WIP) provides improved performance over UL(Uniform-Loading) input.