A General Power Management System
碩士 === 國立成功大學 === 電機工程研究所 === 84 === Circuit design with power saving techniques is one of the most important issues for designers. Based on a well established power consumption model, power saving techniques can be divided into dynamic pow...
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ndltd-TW-084NCKU04420902016-02-05T04:16:28Z http://ndltd.ncl.edu.tw/handle/38782541680732645941 A General Power Management System 電源管理系統之研究 Chin-Yu Chen 陳俊裕 碩士 國立成功大學 電機工程研究所 84 Circuit design with power saving techniques is one of the most important issues for designers. Based on a well established power consumption model, power saving techniques can be divided into dynamic power dissipation saving techniques and static power dissipation saving techniques. Many "low-power" circuit designs focus on reducing dynamic power dissipation. On the other hand, saving energy by using power management techniques is an efficient way to reduce static power dissipation. In the thesis, basic devices and their designs for a general power management system are presented. The basic devices considered include activity monitors, clock counters, and switch control units. Circuits with the function of concurrent monitoring are discussed based on both voltage and current modes and are simulated by HSPICE. Several types of counters are discussed according to their counting capacity, area overhead, and power dissipation. The switch control units are responsible for receiving signals from the monitor and turning on or off the power supply according to the received signals. With these functional units, a general power management system with concurrent monitoring capacity is developed. One of the novel features in our system is that current monitoring for IDDQ and IDDT is employed. IDDQ testing can detect some faults resulting in large quiescent current, thus preventing unnecessary power dissipation. IDDT testing can monitor system activity in transient state. These techniques are used to implement the current mode activity monitor. Several built-in current sensors (BICSs) are developed to detect transient and quiescent currents. The detection speed, area overhead, and performance impact on the original circuits are analyzed. Finally, the integration of IDD testing and power management is discussed. Kuen-Jong Lee 李昆忠 1996 學位論文 ; thesis 58 en_US |
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碩士 === 國立成功大學 === 電機工程研究所 === 84 === Circuit design with power saving techniques is one of the most
important issues for designers. Based on a well established
power consumption model, power saving techniques can be divided
into dynamic power dissipation saving techniques and static
power dissipation saving techniques. Many "low-power" circuit
designs focus on reducing dynamic power dissipation. On the
other hand, saving energy by using power management techniques
is an efficient way to reduce static power dissipation. In the
thesis, basic devices and their designs for a general power
management system are presented. The basic devices considered
include activity monitors, clock counters, and switch control
units. Circuits with the function of concurrent monitoring are
discussed based on both voltage and current modes and are
simulated by HSPICE. Several types of counters are discussed
according to their counting capacity, area overhead, and power
dissipation. The switch control units are responsible for
receiving signals from the monitor and turning on or off the
power supply according to the received signals. With these
functional units, a general power management system with
concurrent monitoring capacity is developed. One of the novel
features in our system is that current monitoring for IDDQ and
IDDT is employed. IDDQ testing can detect some faults resulting
in large quiescent current, thus preventing unnecessary power
dissipation. IDDT testing can monitor system activity in
transient state. These techniques are used to implement the
current mode activity monitor. Several built-in current sensors
(BICSs) are developed to detect transient and quiescent
currents. The detection speed, area overhead, and performance
impact on the original circuits are analyzed. Finally, the
integration of IDD testing and power management is discussed.
|
author2 |
Kuen-Jong Lee |
author_facet |
Kuen-Jong Lee Chin-Yu Chen 陳俊裕 |
author |
Chin-Yu Chen 陳俊裕 |
spellingShingle |
Chin-Yu Chen 陳俊裕 A General Power Management System |
author_sort |
Chin-Yu Chen |
title |
A General Power Management System |
title_short |
A General Power Management System |
title_full |
A General Power Management System |
title_fullStr |
A General Power Management System |
title_full_unstemmed |
A General Power Management System |
title_sort |
general power management system |
publishDate |
1996 |
url |
http://ndltd.ncl.edu.tw/handle/38782541680732645941 |
work_keys_str_mv |
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