State Assignment for Low Power Consumption in Sequential Circuits
碩士 === 國立中興大學 === 資訊科學學系 === 84 === Recently due to the portable applications are more and more popular,the other criterion that evaluates the quality of circuit is emerging be emphasized by circuit designers. This criterion is the amount o...
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ndltd-TW-084NCHU03940122016-02-05T04:16:18Z http://ndltd.ncl.edu.tw/handle/07396864601530941255 State Assignment for Low Power Consumption in Sequential Circuits 循序電路中低功率消耗之狀態指定 Horng, Ming-Do 洪明德 碩士 國立中興大學 資訊科學學系 84 Recently due to the portable applications are more and more popular,the other criterion that evaluates the quality of circuit is emerging be emphasized by circuit designers. This criterion is the amount of power dissipated by circuit. There are many strategies for low power consumption design including the high level circuit architecture im-provement and physical foundry technologies investments. In this thesis, we are interested in synthesis of synchronous sequentail circuits that assign closer codes in Hamming distance to states with higher state transition probability. Two states with closer codes in Hamming distance means fewer bits change and fewer dynamic power dissipation during state transition. Our approach consists of three stages. At first we input the state transition table of circuit and compute the appropriate probability matrix. In second stage, we bipartite the state adjacency graph with probability matrix and embed the bipartite adjacency graph into an n-cube at last. In experimental results, we obtain an average of 44.41% reduction in switching activity at the expense of 16.41% increase in product term compare with NOVA in two level implementations. Wang Sying-Jyan 王行健 1996 學位論文 ; thesis 35 zh-TW |
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碩士 === 國立中興大學 === 資訊科學學系 === 84 === Recently due to the portable applications are more and more
popular,the other criterion that evaluates the quality of
circuit is emerging be emphasized by circuit designers. This
criterion is the amount of power dissipated by circuit. There
are many strategies for low power consumption design including
the high level circuit architecture im-provement and physical
foundry technologies investments. In this thesis, we are
interested in synthesis of synchronous sequentail circuits that
assign closer codes in Hamming distance to states with higher
state transition probability. Two states with closer codes in
Hamming distance means fewer bits change and fewer dynamic power
dissipation during state transition. Our approach consists of
three stages. At first we input the state transition table of
circuit and compute the appropriate probability matrix. In
second stage, we bipartite the state adjacency graph with
probability matrix and embed the bipartite adjacency graph into
an n-cube at last. In experimental results, we obtain an average
of 44.41% reduction in switching activity at the expense of
16.41% increase in product term compare with NOVA in two level
implementations.
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author2 |
Wang Sying-Jyan |
author_facet |
Wang Sying-Jyan Horng, Ming-Do 洪明德 |
author |
Horng, Ming-Do 洪明德 |
spellingShingle |
Horng, Ming-Do 洪明德 State Assignment for Low Power Consumption in Sequential Circuits |
author_sort |
Horng, Ming-Do |
title |
State Assignment for Low Power Consumption in Sequential Circuits |
title_short |
State Assignment for Low Power Consumption in Sequential Circuits |
title_full |
State Assignment for Low Power Consumption in Sequential Circuits |
title_fullStr |
State Assignment for Low Power Consumption in Sequential Circuits |
title_full_unstemmed |
State Assignment for Low Power Consumption in Sequential Circuits |
title_sort |
state assignment for low power consumption in sequential circuits |
publishDate |
1996 |
url |
http://ndltd.ncl.edu.tw/handle/07396864601530941255 |
work_keys_str_mv |
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