| Summary: | 碩士 === 國立中興大學 === 資訊科學學系 === 84 === Recently due to the portable applications are more and more
popular,the other criterion that evaluates the quality of
circuit is emerging be emphasized by circuit designers. This
criterion is the amount of power dissipated by circuit. There
are many strategies for low power consumption design including
the high level circuit architecture im-provement and physical
foundry technologies investments. In this thesis, we are
interested in synthesis of synchronous sequentail circuits that
assign closer codes in Hamming distance to states with higher
state transition probability. Two states with closer codes in
Hamming distance means fewer bits change and fewer dynamic power
dissipation during state transition. Our approach consists of
three stages. At first we input the state transition table of
circuit and compute the appropriate probability matrix. In
second stage, we bipartite the state adjacency graph with
probability matrix and embed the bipartite adjacency graph into
an n-cube at last. In experimental results, we obtain an average
of 44.41% reduction in switching activity at the expense of
16.41% increase in product term compare with NOVA in two level
implementations.
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