| Summary: | 碩士 === 淡江大學 === 資訊工程研究所 === 83 === Simulation is extensively utilized for studying complex
systems. The complexity of simulation models for physical
systems is steadily increasing, and the requirement of real-
time speed has become mandatory. This has all led to the use
of massively parallel computer systems to support parallel
simulation.This thesis emphasizes on the implementation of a
CPU simulator. It's also the first part of the National
Science Council project "Parallel Simulation on a Parallel
Computer Architecture Simulator." Our objective is to simulate
a T805 transputer CPU that can be easily used as a building
block to construct a closely-couple transputer network. INMOS
transputer family is designed and based on the OCCAM language
that is a fulfillment of Hoare's Communicating Sequential
Processes theory. Because of the network nature of transputer,
each T805 CPU has a different structure from a traditional
CPU. For instance, it is a stack-machine processor with 4K
program memory and four communication links for direct
connection to other transputers. Moreover, it has a microcoded
scheduler that enables concurrent processing. We have used the
discrete-event simulation technique to construct our CPU
emulator. In addition, each message sending out through one of
the links will be attached a timestamp that represents the
simulating run-time.
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