Design of four-PEs video signal processor
碩士 === 國立交通大學 === 電子研究所 === 83 === In this thesis, we present a programmable video signal processor which includes four parallel-pipelined processing units, named 4P-VSP. Using the designed datapath architectures, all processing units and stor...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
1995
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| Online Access: | http://ndltd.ncl.edu.tw/handle/80378060542601820663 |