| Summary: | 碩士 === 國立交通大學 === 電子研究所 === 83 === This thesis accomplishes an audio processor design for low-
noise, high-quality, low-complexity and real-time pitch
shifting operation. The audio processor includes a DSM A/D
converter, a pitch shifter and a D/A converter. Operations of
these functions block and their corresponding circuits are
detailed. Many Coefficient design techniques are employed to
facilitate a high-performance design results. These techniques
includes DSM (Delta Sigma Modulator) A/D conversion scheme, a
hybrid low-complexity sinc & compensation decimation filtering,
a simple R-2R DAC scheme and a low-complexity high-fidelity
pitch-shifting algorithm. The pitch-shifting algorithm is based
on a simple frame-base compression/dilation & in-phase
overlapping algorithm. minimum absolute error (MAE) criterion
is adopted as cost function in the pitching operation, because
it produces the best results and lowest complexity compared
with other cost functions. Logic designs of the processor are
completed. Blockwise logic & timing simulations are also
performed.
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