| Summary: | 碩士 === 國立交通大學 === 電子研究所 === 83 === An all-CMOS FSK receiver IC has been designed and tested. It
employs the square-law characteristic of CMOS transistors in
saturated mode. The mixed-mode IC couples many functional
blocks , a few linear voltage-to-current and current-to-voltage
converters, one phase splitter for I-Q demodulation, one
operational amplifier as an integrator in the phase-locked
loop, a limiting amplifier before FSK signal demodulation, two
cascaded sixth-order low-pass filters employing four 'Gm-C'
elements, and a digital combinational logic for decoding the
FSK signals coming out of the limiters in both I-Q arms.
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