Reliability Analysis and FPGA Realization of Fault-Tolerant One- Sided Crossbar Switches for Multiprocessor Systems

碩士 === 國立交通大學 === 資訊科學學系 === 83 === In this thesis, we analyse the reliability of three crossbar switches for shared memory multiprocessor systems: the one- sided crossbar switch}, the modified one-sided crossbar switch, and the ripple K on...

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Bibliographic Details
Main Authors: Chang Feng-Chen, 張鳳真
Other Authors: Kuochen Wang
Format: Others
Language:en_US
Published: 1995
Online Access:http://ndltd.ncl.edu.tw/handle/16059103760654056015
Description
Summary:碩士 === 國立交通大學 === 資訊科學學系 === 83 === In this thesis, we analyse the reliability of three crossbar switches for shared memory multiprocessor systems: the one- sided crossbar switch}, the modified one-sided crossbar switch, and the ripple K one-sided crossbar switch. We also use FPGA tools to implement these three fault-tolerant one-sided crossbar switches. In a traditional two-sided crossbar switch, there is a unique-path between a processor and a memory module. It results in no fault-tolerance in the two-sided crossbar switch. The one-sided crossbar switch enhances the fault tolerance ability by providing multiple paths between a processor and a memory module. However, the cost of the one- sided crossbar switch is almost twice than that of the traditional two-sided crossbar switch. The drawback prevents the one-sided crossbar switch from applying in multiprocessor systems widespreadly. The two new switches can provide a trade- off between fault tolerance ability and cost. However, their reliabilities should be further verified. Results indicate reliability (R(t)) of either of these two switches remains 1 for first ten hours of operation as failure rate = 0.01. This prompts them to be applied to multiprocessors systems to enhance performance and reliability as well. In addition, we use the Synopsys FPGA (Field Programmable Gate Array) Compiler and the Xilinx tools to realize the three fault-tolerant one- sided crossbar switches using FPGAs. The main contribution of this thesis is promoting to adopt the two novel fault-tolerant one-sided crossbar switches in multiprocessor systems by further demonstrating their cost-effectiveness via reliability/ cost analysis and FPGA prototyping.