A Study of Fine-Grained Parallel Processing for Logic Programs
博士 === 國立交通大學 === 資訊工程研究所 === 83 === The problem associated with how to implement a Prolog superscalar system is concerned in this dissertation. This dissertation discusses the performance bottlenecks of the implementation and designs for solving them. Th...
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ndltd-TW-083NCTU03920072015-10-13T12:53:37Z http://ndltd.ncl.edu.tw/handle/92970529653506198918 A Study of Fine-Grained Parallel Processing for Logic Programs 細微平行度邏輯語言並行處理之研究 Ruey-Liang Ma 馬瑞良 博士 國立交通大學 資訊工程研究所 83 The problem associated with how to implement a Prolog superscalar system is concerned in this dissertation. This dissertation discusses the performance bottlenecks of the implementation and designs for solving them. There are two performance bottlenecks in designing a high performance Prolog superscalar system: (1) In Prolog execution, a great deal of bookkeeping is needed, SORWT is designed for solving this problem. It includes all the control information in a windowed register file, thus greatly reduces the memory access operations. (2) Branch instructions stall the prefetching of instruct- ions across basic block, which greatly reduce the perform- ance of a superscalar system. A new branch prediction method PAM is designed to solve this problem, it provides a pred- iction hit rate of 97% in Prolog programs. We combine above design methods and superscalar techniques to construct the Prolog superscalar system. We design two machines with the different system configurations, their speedups are 3.85 and 2.48. Chung-Ping Chung 鍾崇斌 1995 學位論文 ; thesis 124 en_US |
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博士 === 國立交通大學 === 資訊工程研究所 === 83 === The problem associated with how to implement a Prolog
superscalar system is concerned in this dissertation. This
dissertation discusses the performance bottlenecks of the
implementation and designs for solving them. There are two
performance bottlenecks in designing a high performance Prolog
superscalar system: (1) In Prolog execution, a great deal of
bookkeeping is needed, SORWT is designed for solving this
problem. It includes all the control information in a windowed
register file, thus greatly reduces the memory access
operations. (2) Branch instructions stall the prefetching of
instruct- ions across basic block, which greatly reduce the
perform- ance of a superscalar system. A new branch prediction
method PAM is designed to solve this problem, it provides a
pred- iction hit rate of 97% in Prolog programs. We combine
above design methods and superscalar techniques to construct
the Prolog superscalar system. We design two machines with the
different system configurations, their speedups are 3.85 and
2.48.
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author2 |
Chung-Ping Chung |
author_facet |
Chung-Ping Chung Ruey-Liang Ma 馬瑞良 |
author |
Ruey-Liang Ma 馬瑞良 |
spellingShingle |
Ruey-Liang Ma 馬瑞良 A Study of Fine-Grained Parallel Processing for Logic Programs |
author_sort |
Ruey-Liang Ma |
title |
A Study of Fine-Grained Parallel Processing for Logic Programs |
title_short |
A Study of Fine-Grained Parallel Processing for Logic Programs |
title_full |
A Study of Fine-Grained Parallel Processing for Logic Programs |
title_fullStr |
A Study of Fine-Grained Parallel Processing for Logic Programs |
title_full_unstemmed |
A Study of Fine-Grained Parallel Processing for Logic Programs |
title_sort |
study of fine-grained parallel processing for logic programs |
publishDate |
1995 |
url |
http://ndltd.ncl.edu.tw/handle/92970529653506198918 |
work_keys_str_mv |
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