A Programmable Application-Specific CELP Processor with Parallel Architectures
碩士 === 國立成功大學 === 電機工程研究所 === 83 === CELP是一種語音編碼技術,它在4.8 Kb/s 的低位元率 (low bit rates) 之下仍能產生音質頗佳之合成語音的表現,是其備受青睞的原因。但是高 計算複雜度卻形成編碼速度上的瓶頸而急待改善。在完成C 及 TI 公司 TMS320C30 晶片的軟體實現,我們希望能經由硬體實現使演算速度再提昇 。本論文提出一個為 CELP特殊設計的DSP架構。針對CELP中的運算...
Main Authors: | Bor-Yueh Liu, 劉伯岳 |
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Other Authors: | Jhing-Fa Wang |
Format: | Others |
Language: | zh-TW |
Published: |
1995
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Online Access: | http://ndltd.ncl.edu.tw/handle/42626156099237832313 |
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