Design, Simulation and Characterization of a Bandgap Reference Circuit Using Parasitic Lateral Bipolar Transistors in a CMOS Technology

• Main Authors: L.S. Hwang, 黃林祥
• Other Authors: Ta-Hui Wang
• Format: Others
• Language: en_US
• Published: 1994
• Online Access: http://ndltd.ncl.edu.tw/handle/74919519204875353818

碩士 === 國立交通大學 === 電子研究所 === 82 === Parasitic BJT's in a standard CMOS technology have been implemented in some mixed-mode digital and analog circuits. The advantages are to reduce fabrication cost and technology complexity. In this thesis, we intended to implement BJT's in the lateral direction in a bandgap voltage reference circuit using a standard 0.8um CMOS technology. The circuit includes a current mirror, an operational amplifier and an output buffer for a constant output current. Temperature stability is a key concern of this circuit for the purpose of accurate conversion between digital and analog signals. The layout geometry of the BJT's have been optimized to find a highest current gain in the current mirror circuit. A current gain of nearly 30 has been achieved. In order for SPICE simulation, lateral BJT SPICE modeling is needed. Device characterization and parameter extraction are done with a commercial software AURORA. Good agreement between modeling and measurement is emphasized in the active region, where the devices are operated in a current mirror circuit. In the saturation of the BJT's, a large discrepancy from the SPICE model is observed due to the contemporary existence of parasitic vertical BJT's. SPICE simulation of the bandgap reference circuit has been performed at various temperatures. The optimization of the circuit is attempted for a minimum temperature sensitivity around an operational temperature about 70℃. In experiment, the circuit was fabricated and characterized. The measured results show minimum temperature dependence of the output current around T=90 ℃.