| Summary: | 碩士 === 國立交通大學 === 電子研究所 === 82 === Advances in the fabrication of arrays of micro-scale gated
field emitters over the last two decades have encouraged
more workers to enter the field of vacuum microelectronics.In a
field- emission-type electron source, a high field of 1-10
MV/cm is required to effectively overcome the tunneling
barrier. There are several ways to reduce the operating voltage.
First,the tip radius can be made as small as possible.
Second, the distance between emitter and gate can be reduced.
Third, a material with a low work function can be used.To this
end, we fabricate self-aligned field emission devices using
lateral oxidation sharpening technology. This process is
simple and the gate aperture is smaller than the original mask
size. Devices with volcano-shaped gate of various geometries
are fabricated. To study the characteristics of the volcano
devices, we develope a 2-D FED simulator that can handle
arbitrary device structures.Devices with planar gate and
volcano- shaped gate are evaluated in our study. We find the
gate geometry effect plays an important role on device
performance. The effects of device geometry parameters
including the tip angle,the related tip-to-gate height,the
emitter shape and the gate aperture on the device performance
are also studied in this thesis.
|
|---|
