Integrated Support to Improve Inter-Thread Communication and Synchronization in a Multithreaded Processor

• Main Authors: Chiun-Shiu Chen, 陳俊旭
• Other Authors: Chien-Chao Tseng
• Format: Others
• Language: en_US
• Published: 1994
• Online Access: http://ndltd.ncl.edu.tw/handle/84705715131146512462

碩士 === 國立交通大學 === 資訊工程研究所 === 82 === This thesis suggests an integrated compiler, runtime control, and hardware solution to improve inter-thread communication and synchronization in a multithreaded processor architecture. Multithreading improves processor utilization by supporting and exphoiting more parallelism. The improvement of utilization, however, meets a great hindrance in inter-thread communication and synchronization problems. These problems incur extra communication overheads and thus cause the performance degradation in a multithreading system. In this thesis, we will propose efficient inter-thread communication and synchronization schemes based on a superscalar DLX processor with multithreading functionality. These schemes will be discussed from viewpoints of compiler, runtime control, and hardware supports. We also give the simulation result to show the correctness and effectiveness of the proposed schemes.