An Implementation and Improvement Method of 32-Bit Logarithmic Multiplier and Divider by Four Partitioned Hubrid Roms Look-up Table Strategy

• Main Authors: Hor, Yang Uang, 何永源
• Other Authors: Lo, Hao Yung
• Format: Others
• Language: zh-TW
• Published: 1994
• Online Access: http://ndltd.ncl.edu.tw/handle/63962064746880348090

碩士 === 逢甲大學 === 資訊工程研究所 === 82 === The logarithmic number system (LNS) have long been used in arithmetic to simplify the process such as : multiplication, division, square, and square root, etc. The difficult may arise from the accuracy of conversion from binary number to the logarithmic number used in the floating-point arithmetics. During the early period of implementation for binary number to logarithm conversion, a Three- Partitioned Hybrid Roms strategy developed by this laboratory (High Performace Computing Laboratory ) is adapted. We thought that three-partations was the optimal case at that time because four or more partitions is very complicated if it is not possible to be implemented from the point view of Wan's scheme. But now we have a new scheme to implement the chips. This method makes the four- partitioned Roms for logarithm conversion easily implemented. Moreover, the representation of binary logarithm number is more accurate and the conversion speed is also higher than that of three partition's scheme implementation. This is because at least two levels of addition which is significantly reduced the performance conversion are eliminated during the processes of conversion. The only drawback of this scheme is that it may increase the useful area during the VLSI implementation. We think this will be overcomed due to the matured VLSI technology. In this thesis, we exploure Four Paritioned Hybrid Roms (FPH-Roms) look-up table strategy by using Taylor series expansion and merge some complex expressionm to reduce critical path of the circuit architecture. Furthermore, we have simulated and verified the multiplication and division operations with FPH-Roms converter on sun work station by using the VLSI system.