A Simulator of Distributed-Memory Multicomputers for Paralleliz- ing Compilers
碩士 === 國立中央大學 === 資訊及電子工程研究所 === 81 === This thesis presents a simulator of distributed-memory multicomputers that is capable of simulating the execution of processing elements (PEs) and inter-processor communication. The input of...
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ndltd-TW-081NCU003930032016-07-20T04:11:45Z http://ndltd.ncl.edu.tw/handle/38211875994508553416 A Simulator of Distributed-Memory Multicomputers for Paralleliz- ing Compilers 為平行編譯器製作一個分散式記憶體多處理機之模擬器 Ni Sze Yao 倪嗣堯 碩士 國立中央大學 資訊及電子工程研究所 81 This thesis presents a simulator of distributed-memory multicomputers that is capable of simulating the execution of processing elements (PEs) and inter-processor communication. The input of the simulator is a set of executable object codes for each processor with embedded message-passing primitives, such as SEND and RECEIVE, for parallelizing execution. The output of the simulator includes statistics of the usage of each component (such as PE, link and router) and records of system behaviors, such as when and what message- passing primitive is executed on a PE. The output will be presented to programmers, or be referenced by parallelizing compilers for compiling decisions during optimization or parallelization phase. The technique of discrete-event simulation is used to implement our simulator. The PE, router, and link are modeled as objects, and the interactions among objects are modeled as events. The simulator is parameterized, which allows various configurations of multicomputers to be simulated. Since the inter-processor activities dominate most of the performance of the distributed-memory multicomputers, much attention has been given to the simulation of inter-communication mechanism. A few results are presented for demonstration. Sheu Jang Ping 許健平 1993 學位論文 ; thesis 48 en_US |
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碩士 === 國立中央大學 === 資訊及電子工程研究所 === 81 === This thesis presents a simulator of distributed-memory
multicomputers that is capable of simulating the execution of
processing elements (PEs) and inter-processor communication.
The input of the simulator is a set of executable object
codes for each processor with embedded message-passing
primitives, such as SEND and RECEIVE, for parallelizing
execution. The output of the simulator includes statistics of
the usage of each component (such as PE, link and router) and
records of system behaviors, such as when and what message-
passing primitive is executed on a PE. The output will be
presented to programmers, or be referenced by parallelizing
compilers for compiling decisions during optimization or
parallelization phase. The technique of discrete-event
simulation is used to implement our simulator. The PE,
router, and link are modeled as objects, and the interactions
among objects are modeled as events. The simulator is
parameterized, which allows various configurations of
multicomputers to be simulated. Since the inter-processor
activities dominate most of the performance of the
distributed-memory multicomputers, much attention has been
given to the simulation of inter-communication mechanism. A
few results are presented for demonstration.
|
author2 |
Sheu Jang Ping |
author_facet |
Sheu Jang Ping Ni Sze Yao 倪嗣堯 |
author |
Ni Sze Yao 倪嗣堯 |
spellingShingle |
Ni Sze Yao 倪嗣堯 A Simulator of Distributed-Memory Multicomputers for Paralleliz- ing Compilers |
author_sort |
Ni Sze Yao |
title |
A Simulator of Distributed-Memory Multicomputers for Paralleliz- ing Compilers |
title_short |
A Simulator of Distributed-Memory Multicomputers for Paralleliz- ing Compilers |
title_full |
A Simulator of Distributed-Memory Multicomputers for Paralleliz- ing Compilers |
title_fullStr |
A Simulator of Distributed-Memory Multicomputers for Paralleliz- ing Compilers |
title_full_unstemmed |
A Simulator of Distributed-Memory Multicomputers for Paralleliz- ing Compilers |
title_sort |
simulator of distributed-memory multicomputers for paralleliz- ing compilers |
publishDate |
1993 |
url |
http://ndltd.ncl.edu.tw/handle/38211875994508553416 |
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