NEW DELAY MODELING TECHNIQUES AND PHYSICAL TIMING MODELS OF BIPOLAR NONSTURATION LOGIC CIRCUITS AND TEEIR APPLICATIONS IN PERFORMANCE IMPROVEMENT

博士 === 國立交通大學 === 電子研究所 === 79 ===

Bibliographic Details
Main Authors:	WU, TIAN-XIANG, 吳添祥
Other Authors:	WU, CHONG-YU
Format:	Others
Language:	zh-TW
Published:	1990
Online Access:	http://ndltd.ncl.edu.tw/handle/65161249647490744364

id	ndltd-TW-079NCTU2430016
record_format	oai_dc
spelling	ndltd-TW-079NCTU24300162016-07-25T04:07:10Z http://ndltd.ncl.edu.tw/handle/65161249647490744364 NEW DELAY MODELING TECHNIQUES AND PHYSICAL TIMING MODELS OF BIPOLAR NONSTURATION LOGIC CIRCUITS AND TEEIR APPLICATIONS IN PERFORMANCE IMPROVEMENT 非飽和雙極性邏輯電路的新型延遲模式化技術和物理時序與其在電路性能改進之應用 WU, TIAN-XIANG 吳添祥博士國立交通大學電子研究所 79 WU, CHONG-YU 吳重雨 1990 學位論文 ; thesis 71 zh-TW
collection	NDLTD
language	zh-TW
format	Others
sources	NDLTD
description	博士 === 國立交通大學 === 電子研究所 === 79 ===
author2	WU, CHONG-YU
author_facet	WU, CHONG-YU WU, TIAN-XIANG 吳添祥
author	WU, TIAN-XIANG 吳添祥
spellingShingle	WU, TIAN-XIANG 吳添祥 NEW DELAY MODELING TECHNIQUES AND PHYSICAL TIMING MODELS OF BIPOLAR NONSTURATION LOGIC CIRCUITS AND TEEIR APPLICATIONS IN PERFORMANCE IMPROVEMENT
author_sort	WU, TIAN-XIANG
title	NEW DELAY MODELING TECHNIQUES AND PHYSICAL TIMING MODELS OF BIPOLAR NONSTURATION LOGIC CIRCUITS AND TEEIR APPLICATIONS IN PERFORMANCE IMPROVEMENT
title_short	NEW DELAY MODELING TECHNIQUES AND PHYSICAL TIMING MODELS OF BIPOLAR NONSTURATION LOGIC CIRCUITS AND TEEIR APPLICATIONS IN PERFORMANCE IMPROVEMENT
title_full	NEW DELAY MODELING TECHNIQUES AND PHYSICAL TIMING MODELS OF BIPOLAR NONSTURATION LOGIC CIRCUITS AND TEEIR APPLICATIONS IN PERFORMANCE IMPROVEMENT
title_fullStr	NEW DELAY MODELING TECHNIQUES AND PHYSICAL TIMING MODELS OF BIPOLAR NONSTURATION LOGIC CIRCUITS AND TEEIR APPLICATIONS IN PERFORMANCE IMPROVEMENT
title_full_unstemmed	NEW DELAY MODELING TECHNIQUES AND PHYSICAL TIMING MODELS OF BIPOLAR NONSTURATION LOGIC CIRCUITS AND TEEIR APPLICATIONS IN PERFORMANCE IMPROVEMENT
title_sort	new delay modeling techniques and physical timing models of bipolar nonsturation logic circuits and teeir applications in performance improvement
publishDate	1990
url	http://ndltd.ncl.edu.tw/handle/65161249647490744364
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NEW DELAY MODELING TECHNIQUES AND PHYSICAL TIMING MODELS OF BIPOLAR NONSTURATION LOGIC CIRCUITS AND TEEIR APPLICATIONS IN PERFORMANCE IMPROVEMENT

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