A three-dimensional parasitic capacitance simulator and its application to ROM design

A three-dimensional parasitic capacitance simulator and its application to ROM design

碩士 === 國立交通大學 === 電子研究所 === 78 ===

Bibliographic Details
Main Authors:	HUANG,JUN-DA, 黃俊達
Other Authors:	ZHUANG,SHAO-XUN
Format:	Others
Language:	zh-TW
Published:	1991
Online Access:	http://ndltd.ncl.edu.tw/handle/86072330257928546326

Description
Summary:	碩士 === 國立交通大學 === 電子研究所 === 78 ===