A 32-bit hybrid floating-point binary and logarithmic number system processor
碩士 === 逢甲大學 === 資訊工程研究所 === 78 ===
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1990
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Online Access: | http://ndltd.ncl.edu.tw/handle/10886867769518457164 |
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ndltd-TW-078FCU023920122015-10-13T15:12:05Z http://ndltd.ncl.edu.tw/handle/10886867769518457164 A 32-bit hybrid floating-point binary and logarithmic number system processor 整合二元及對系統之32位元浮點處理器 XIE,REN-FA 謝仁發 碩士 逢甲大學 資訊工程研究所 78 LUO,HAO-RONG 羅浩榮 1990 學位論文 ; thesis 160 zh-TW |
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zh-TW |
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Others
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碩士 === 逢甲大學 === 資訊工程研究所 === 78 ===
|
author2 |
LUO,HAO-RONG |
author_facet |
LUO,HAO-RONG XIE,REN-FA 謝仁發 |
author |
XIE,REN-FA 謝仁發 |
spellingShingle |
XIE,REN-FA 謝仁發 A 32-bit hybrid floating-point binary and logarithmic number system processor |
author_sort |
XIE,REN-FA |
title |
A 32-bit hybrid floating-point binary and logarithmic number system processor |
title_short |
A 32-bit hybrid floating-point binary and logarithmic number system processor |
title_full |
A 32-bit hybrid floating-point binary and logarithmic number system processor |
title_fullStr |
A 32-bit hybrid floating-point binary and logarithmic number system processor |
title_full_unstemmed |
A 32-bit hybrid floating-point binary and logarithmic number system processor |
title_sort |
32-bit hybrid floating-point binary and logarithmic number system processor |
publishDate |
1990 |
url |
http://ndltd.ncl.edu.tw/handle/10886867769518457164 |
work_keys_str_mv |
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