Computer aided digital signal processing-systolic array processor architecture design

碩士 === 中原大學 === 電子工程研究所 === 77 ===

Bibliographic Details
Main Authors: XING, DING-SHOU, 邢定首
Other Authors: WANG, HUANG-SAN
Format: Others
Language:zh-TW
Published: 1989
Online Access:http://ndltd.ncl.edu.tw/handle/14174663235451170534
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spelling ndltd-TW-077CYCU24280162016-07-29T04:13:03Z http://ndltd.ncl.edu.tw/handle/14174663235451170534 Computer aided digital signal processing-systolic array processor architecture design 電腦輔助數位信號處理之心縮式陣列處理器架構設計 XING, DING-SHOU 邢定首 碩士 中原大學 電子工程研究所 77 WANG, HUANG-SAN ZHOU, YI-CHANG 王晃三 周義昌 1989 學位論文 ; thesis 67 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 中原大學 === 電子工程研究所 === 77 ===
author2 WANG, HUANG-SAN
author_facet WANG, HUANG-SAN
XING, DING-SHOU
邢定首
author XING, DING-SHOU
邢定首
spellingShingle XING, DING-SHOU
邢定首
Computer aided digital signal processing-systolic array processor architecture design
author_sort XING, DING-SHOU
title Computer aided digital signal processing-systolic array processor architecture design
title_short Computer aided digital signal processing-systolic array processor architecture design
title_full Computer aided digital signal processing-systolic array processor architecture design
title_fullStr Computer aided digital signal processing-systolic array processor architecture design
title_full_unstemmed Computer aided digital signal processing-systolic array processor architecture design
title_sort computer aided digital signal processing-systolic array processor architecture design
publishDate 1989
url http://ndltd.ncl.edu.tw/handle/14174663235451170534
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AT xíngdìngshǒu diànnǎofǔzhùshùwèixìnhàochùlǐzhīxīnsuōshìzhènlièchùlǐqìjiàgòushèjì
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