The reconfiguration and switch design of array processors

碩士 === 國立交通大學 === 電子研究所 === 75 ===

Bibliographic Details
Main Authors: Huang, Jian-Ren, 黃建仁
Other Authors: Ren, Jian-Wei
Format: Others
Language:en_US
Published: 1987
Online Access:http://ndltd.ncl.edu.tw/handle/54560311912323477544
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spelling ndltd-TW-075NCTU44300092016-02-12T04:10:35Z http://ndltd.ncl.edu.tw/handle/54560311912323477544 The reconfiguration and switch design of array processors 陣列處理器的再組與開關設計 Huang, Jian-Ren 黃建仁 碩士 國立交通大學 電子研究所 75 Ren, Jian-Wei 任建葳 1987 學位論文 ; thesis 124 en_US
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language en_US
format Others
sources NDLTD
description 碩士 === 國立交通大學 === 電子研究所 === 75 ===
author2 Ren, Jian-Wei
author_facet Ren, Jian-Wei
Huang, Jian-Ren
黃建仁
author Huang, Jian-Ren
黃建仁
spellingShingle Huang, Jian-Ren
黃建仁
The reconfiguration and switch design of array processors
author_sort Huang, Jian-Ren
title The reconfiguration and switch design of array processors
title_short The reconfiguration and switch design of array processors
title_full The reconfiguration and switch design of array processors
title_fullStr The reconfiguration and switch design of array processors
title_full_unstemmed The reconfiguration and switch design of array processors
title_sort reconfiguration and switch design of array processors
publishDate 1987
url http://ndltd.ncl.edu.tw/handle/54560311912323477544
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