The design of associative memory using parallel hardware hashing

碩士 === 國立成功大學 === 電機工程研究所 === 75 ===

Bibliographic Details
Main Authors:	LIN, YU-XIANG, 林昱翔
Other Authors:	HE, YU-KUN
Format:	Others
Language:	zh-TW
Published:	1987
Online Access:	http://ndltd.ncl.edu.tw/handle/76149734673096753764

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record_format	oai_dc
spelling	ndltd-TW-075NCKU24420442016-02-12T04:10:32Z http://ndltd.ncl.edu.tw/handle/76149734673096753764 The design of associative memory using parallel hardware hashing 使用平行硬體赫序法設計之關聯記憶體 LIN, YU-XIANG 林昱翔碩士國立成功大學電機工程研究所 75 HE, YU-KUN 何裕琨 1987 學位論文 ; thesis 0 zh-TW
collection	NDLTD
language	zh-TW
format	Others
sources	NDLTD
description	碩士 === 國立成功大學 === 電機工程研究所 === 75 ===
author2	HE, YU-KUN
author_facet	HE, YU-KUN LIN, YU-XIANG 林昱翔
author	LIN, YU-XIANG 林昱翔
spellingShingle	LIN, YU-XIANG 林昱翔 The design of associative memory using parallel hardware hashing
author_sort	LIN, YU-XIANG
title	The design of associative memory using parallel hardware hashing
title_short	The design of associative memory using parallel hardware hashing
title_full	The design of associative memory using parallel hardware hashing
title_fullStr	The design of associative memory using parallel hardware hashing
title_full_unstemmed	The design of associative memory using parallel hardware hashing
title_sort	design of associative memory using parallel hardware hashing
publishDate	1987
url	http://ndltd.ncl.edu.tw/handle/76149734673096753764
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The design of associative memory using parallel hardware hashing

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