Detailed routing for VLSI

Detailed routing for VLSI

博士 === 國立成功大學 === 電機工程研究所 === 75 ===

Bibliographic Details
Main Authors:	ZHOU, ZHE-MIN, 周哲民
Other Authors:	LI, ZAO-YAN
Format:	Others
Language:	zh-TW
Published:	1987
Online Access:	http://ndltd.ncl.edu.tw/handle/61458563993947928440

Similar Items

VLSI routing
by: Chaudhray, Kamal
Published: (1990)

A Gridless Initial Detailed Router for Advanced VLSI Technologies
by: Hong, Min-Feng, et al.
Published: (2019)

VLSI multi-layer channel routing
by: CHEN,CONG-MIN, et al.
Published: (1991)

Routing Algorithms for VLSI Circuits
by: Shuenn-Shi Chen, et al.
Published: (2000)

Approximation algorithms for VLSI routing
by: Măndoiu, Ion I.
Published: (2006)

A Detailed Placement Algorithm for Large-Scale VLSI Circuits
by: Tien-Chang Hsu, et al.
Published: (2006)

Power Routing in VLSI Physical Design
by: Po-Shu Shih, et al.
Published: (2005)

Application of network coding for VLSI routing
by: Nemade, Nikhil Pandit
Published: (2010)

A study of knowledge based VLSI routing
by: LAI, JUN-ZAI, et al.
Published: (1986)

Timing-driven detailed routing
by: Chung, Man-Yun, et al.
Published: (2018)

Detailed Routing for FIB Probing
by: Chia-Yi Lee, et al.
Published: (2012)

Modern VLSI Routing Considering Reliability and Manufacturability
by: Huang-Yu Chen, et al.
Published: (2009)

Design and implement three-layer routing algorithm for VLSI
by: WU, FU-LIANG, et al.
Published: (1986)

A Power and Ground Routing Methodology for VLSI Layout.
by: Jun-Cheng Chi, et al.
Published: (2001)

VLSI Placement Considering Routability, Performance, and Reliability
by: Zhe-Wei Jiang, et al.
Published: (2009)

Placement and routing in VLSI design problem using single row routing technique
by: Johar, Farhana, et al.
Published: (2007)

Application of parallel processing techniques to routing for VLSI design
by: Sagar, V. K.
Published: (1990)

A flexible approach to mask-level VLSI routing
by: Sharpe, M. F.
Published: (1990)

Routing the power and ground wires on a VLSI chip
by: Moulton, Andrew Strout
Published: (2005)

A Timing-Driven Multilevel Routing Algorithm for VLSI Design
by: Chih-Hsin Fu, et al.
Published: (2003)

Noise Associated with Metal Line Interconnection in VLSI
by: LIU,DE-MIN, et al.
Published: (1991)

RLC Noise-Bounded Routing Design Flow Prior to Detailed Routing
by: Peng-Yang Hung, et al.
Published: (2005)

A study of routing algorithms for printed circuit boards and VLSI
by: Kong, Xuan.
Published: (2012)

A study of routing algorithms for printed circuit boards and VLSI
by: Kong, Xuan.
Published: (2012)

Timing-Driven Routing in VLSI Physical Design Under Uncertainty
by: Samanta, Radhamanjari
Published: (2018)

A Survey of Swarm Intelligence Techniques in VLSI Routing Problems
by: Xiaohua Chen, et al.
Published: (2020-01-01)

Effective Refinement Methods for Initial Detailed Routing
by: Chung, Chia-Chun, et al.
Published: (2018)

Track-Assignment-Based Initial Detailed Routing
by: Tsou, Chien-Hao, et al.
Published: (2018)

The design of VLSI array processors for concurrent error detection
by: LIU, GI-MIN, et al.
Published: (1987)

An integrated approach to block placement, routing and compaction in VLSI circuit layout
by: 蔡加春
Published: (1991)

An efficient algorithm to yield an optimal solution for the channel routing problem in VLSI
by: WANG, JIA-XIANG, et al.
Published: (1986)

Approaches to multilayer channel routing and via minimization problems in VLSI layout
by: Fang, Song Chuan, et al.
Published: (1995)

The Construction of Imaging Circuit for Efficient VLSI Circuit Verification
by: Yan-Min Chen, et al.
Published: (2000)

A comparison of device isolations of VLSI fabrication
by: ZHOU, ZHI-WEN, et al.
Published: (1988)

EXPIDER: An Object-based, Hybrid Expert System for VLSI Channel Routing
by: Shen,Ding-Lan, et al.
Published: (1996)

A Survey on Steiner Tree Construction and Global Routing for VLSI Design
by: Hao Tang, et al.
Published: (2020-01-01)

Detailed routing architectures for embedded programmable IP cores
by: Hallschmid, Peter
Published: (2009)

Detailed routing architectures for embedded programmable IP cores
by: Hallschmid, Peter
Published: (2009)

Triple patterning aware grid-based detailed routing
Published: (2015)

CAD placement of IC layout
by: Zhou, Zhe-Min, et al.
Published: (1983)

Cannot write session to /tmp/vufind_sessions/sess_h6980k983a0rohbhslf1anhi2k