REDUCED COMPLEMENTARY DYNAMIC AND DIFFERENTIAL CMOS LOGIC: A DESIGN METHODOLOGY FOR DPA RESISTANT CRYPTOGRAPHIC CIRCUITS

REDUCED COMPLEMENTARY DYNAMIC AND DIFFERENTIAL CMOS LOGIC: A DESIGN METHODOLOGY FOR DPA RESISTANT CRYPTOGRAPHIC CIRCUITS

Bibliographic Details
Main Author: RAMMOHAN, SRIVIDHYA
Language:English
Published: University of Cincinnati / OhioLINK 2007
Subjects:
Differential Power Analysis (DPA) Attacks
Secret Key
Dynamic Differential Logic
Side-Channel Attacks
Online Access:http://rave.ohiolink.edu/etdc/view?acc_num=ucin1179459225
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spelling ndltd-OhioLink-oai-etd.ohiolink.edu-ucin11794592252021-08-03T06:11:55Z REDUCED COMPLEMENTARY DYNAMIC AND DIFFERENTIAL CMOS LOGIC: A DESIGN METHODOLOGY FOR DPA RESISTANT CRYPTOGRAPHIC CIRCUITS RAMMOHAN, SRIVIDHYA Differential Power Analysis (DPA) Attacks Secret Key Dynamic Differential Logic Side-Channel Attacks In recent times, many embedded applications such as mobile phones, smart-cards, etc. use cryptographic devices that use a secret key to encrypt sensitive data to secure it. Encryption algorithms are often challenged during physical implementation (ICs), providing key information to the attackers. Differential Power Analysis (DPA) is a power attack technique uses the difference in power consumed by each input data in conjunction with statistical analysis to extract statistical information that correlates power consumption to the secret key. Our goal is to present a Dynamic Differential Logic style whose power consumption is input independent and which reuses part of circuit to generate differential output. The logic style proposed by us, Reduced Complementary Dynamic and Differential logic (RCDDL) style helps achieve increased DPA resistance with 31.66% improvement in security strength, 14% reduction in power and 7.75% reduction in area on an average when compared to other existing logic styles. 2007-07-03 English text University of Cincinnati / OhioLINK http://rave.ohiolink.edu/etdc/view?acc_num=ucin1179459225 http://rave.ohiolink.edu/etdc/view?acc_num=ucin1179459225 unrestricted This thesis or dissertation is protected by copyright: all rights reserved. It may not be copied or redistributed beyond the terms of applicable copyright laws.
collection NDLTD
language English
sources NDLTD
topic Differential Power Analysis (DPA) Attacks
Secret Key
Dynamic Differential Logic
Side-Channel Attacks
spellingShingle Differential Power Analysis (DPA) Attacks
Secret Key
Dynamic Differential Logic
Side-Channel Attacks
RAMMOHAN, SRIVIDHYA
REDUCED COMPLEMENTARY DYNAMIC AND DIFFERENTIAL CMOS LOGIC: A DESIGN METHODOLOGY FOR DPA RESISTANT CRYPTOGRAPHIC CIRCUITS
author RAMMOHAN, SRIVIDHYA
author_facet RAMMOHAN, SRIVIDHYA
author_sort RAMMOHAN, SRIVIDHYA
title REDUCED COMPLEMENTARY DYNAMIC AND DIFFERENTIAL CMOS LOGIC: A DESIGN METHODOLOGY FOR DPA RESISTANT CRYPTOGRAPHIC CIRCUITS
title_short REDUCED COMPLEMENTARY DYNAMIC AND DIFFERENTIAL CMOS LOGIC: A DESIGN METHODOLOGY FOR DPA RESISTANT CRYPTOGRAPHIC CIRCUITS
title_full REDUCED COMPLEMENTARY DYNAMIC AND DIFFERENTIAL CMOS LOGIC: A DESIGN METHODOLOGY FOR DPA RESISTANT CRYPTOGRAPHIC CIRCUITS
title_fullStr REDUCED COMPLEMENTARY DYNAMIC AND DIFFERENTIAL CMOS LOGIC: A DESIGN METHODOLOGY FOR DPA RESISTANT CRYPTOGRAPHIC CIRCUITS
title_full_unstemmed REDUCED COMPLEMENTARY DYNAMIC AND DIFFERENTIAL CMOS LOGIC: A DESIGN METHODOLOGY FOR DPA RESISTANT CRYPTOGRAPHIC CIRCUITS
title_sort reduced complementary dynamic and differential cmos logic: a design methodology for dpa resistant cryptographic circuits
publisher University of Cincinnati / OhioLINK
publishDate 2007
url http://rave.ohiolink.edu/etdc/view?acc_num=ucin1179459225
work_keys_str_mv AT rammohansrividhya reducedcomplementarydynamicanddifferentialcmoslogicadesignmethodologyfordparesistantcryptographiccircuits
_version_ 1719432583918387200

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