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ndltd-OhioLink-oai-etd.ohiolink.edu-ucin1135886344
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oai_dc
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ndltd-OhioLink-oai-etd.ohiolink.edu-ucin11358863442021-08-03T06:10:42Z FAULT MODELING AND DETECTION FOR DROWSY SRAM CACHES PEI, WEI As CMOS transistor feature size shrinks, sub-threshold leakage power dissipation begins to dominate the total power consumption of a chip. A drowsy technique was introduced to reduce sub-threshold leakage power significantly. However, with the introduction of the drowsy cache design technique, new fault behaviors appear and more restrictive design rules must be concerned. In this research, we implement a drowsy SRAM cache with peripheral circuits in layout level and simulate all possible spot defects (SDs) under normal mode and drowsy mode in different resistance regions. Six new fault models appear with the introduction of drowsy mode for memory arrays. We develop a march algorithm which can detect all SDs in either data caches or instruction caches. A built-in self-repair (BISR) scheme is developed. By utilizing BISR, the cache can still work even if some cache lines fail to work in drowsy mode. 2005 English text University of Cincinnati / OhioLINK http://rave.ohiolink.edu/etdc/view?acc_num=ucin1135886344 http://rave.ohiolink.edu/etdc/view?acc_num=ucin1135886344 unrestricted This thesis or dissertation is protected by copyright: all rights reserved. It may not be copied or redistributed beyond the terms of applicable copyright laws.
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| collection |
NDLTD
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| language |
English
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| sources |
NDLTD
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| author |
PEI, WEI
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| spellingShingle |
PEI, WEI
FAULT MODELING AND DETECTION FOR DROWSY SRAM CACHES
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| author_facet |
PEI, WEI
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| author_sort |
PEI, WEI
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| title |
FAULT MODELING AND DETECTION FOR DROWSY SRAM CACHES
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| title_short |
FAULT MODELING AND DETECTION FOR DROWSY SRAM CACHES
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| title_full |
FAULT MODELING AND DETECTION FOR DROWSY SRAM CACHES
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| title_fullStr |
FAULT MODELING AND DETECTION FOR DROWSY SRAM CACHES
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| title_full_unstemmed |
FAULT MODELING AND DETECTION FOR DROWSY SRAM CACHES
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| title_sort |
fault modeling and detection for drowsy sram caches
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| publisher |
University of Cincinnati / OhioLINK
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| publishDate |
2005
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| url |
http://rave.ohiolink.edu/etdc/view?acc_num=ucin1135886344
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| work_keys_str_mv |
AT peiwei faultmodelinganddetectionfordrowsysramcaches
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| _version_ |
1719432247086415872
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