id ndltd-OhioLink-oai-etd.ohiolink.edu-ucin1100584283
record_format oai_dc
spelling ndltd-OhioLink-oai-etd.ohiolink.edu-ucin11005842832021-08-03T06:10:00Z A TOP-DOWN METHODOLOGY FOR SYNTHESIS OF RF CIRCUITS VIJAY, VIKAS Radio Frequency Synthesis Optimization Automation Layout Generation RF Analog High Frequency Module Generation C++ SKILL Extraction Performance Analysis Circuit Sizing Radio Receiver LNA Mixer VCO Phase Frequency Detector This thesis presents automated techniques for synthesis of high performance RF circuits. The top-down methodology developed encompasses all stages of RF design from circuit sizing, layout generation to parasitic extraction and performance analysis. The objective of this methodology is to minimize the design time and generate efficient, correct and re-usable design solutions. In the proposed methodology, given a circuit netlist and a set of performance goals, a ready-to-tapeout layout is generated which meets the specified performance constraints. A sizing tool is integrated to perform design space exploration. A parameterized layout generator generates the layout based on the input sizes. An RF-Performance Analysis system (PAS-RF) comprising of a set of C++ functions is also developed for measuring the performance of the RF circuit. The proposed methodology is successfully tested by synthesizing variants of RF receiver circuits (LNA, Mixers, VCO etc.) for different performance criterion. 2004 English text University of Cincinnati / OhioLINK http://rave.ohiolink.edu/etdc/view?acc_num=ucin1100584283 http://rave.ohiolink.edu/etdc/view?acc_num=ucin1100584283 unrestricted This thesis or dissertation is protected by copyright: all rights reserved. It may not be copied or redistributed beyond the terms of applicable copyright laws.
collection NDLTD
language English
sources NDLTD
topic Radio Frequency
Synthesis
Optimization
Automation
Layout Generation
RF
Analog
High Frequency
Module Generation
C++
SKILL
Extraction
Performance Analysis
Circuit Sizing
Radio Receiver
LNA
Mixer
VCO
Phase Frequency Detector
spellingShingle Radio Frequency
Synthesis
Optimization
Automation
Layout Generation
RF
Analog
High Frequency
Module Generation
C++
SKILL
Extraction
Performance Analysis
Circuit Sizing
Radio Receiver
LNA
Mixer
VCO
Phase Frequency Detector
VIJAY, VIKAS
A TOP-DOWN METHODOLOGY FOR SYNTHESIS OF RF CIRCUITS
author VIJAY, VIKAS
author_facet VIJAY, VIKAS
author_sort VIJAY, VIKAS
title A TOP-DOWN METHODOLOGY FOR SYNTHESIS OF RF CIRCUITS
title_short A TOP-DOWN METHODOLOGY FOR SYNTHESIS OF RF CIRCUITS
title_full A TOP-DOWN METHODOLOGY FOR SYNTHESIS OF RF CIRCUITS
title_fullStr A TOP-DOWN METHODOLOGY FOR SYNTHESIS OF RF CIRCUITS
title_full_unstemmed A TOP-DOWN METHODOLOGY FOR SYNTHESIS OF RF CIRCUITS
title_sort top-down methodology for synthesis of rf circuits
publisher University of Cincinnati / OhioLINK
publishDate 2004
url http://rave.ohiolink.edu/etdc/view?acc_num=ucin1100584283
work_keys_str_mv AT vijayvikas atopdownmethodologyforsynthesisofrfcircuits
AT vijayvikas topdownmethodologyforsynthesisofrfcircuits
_version_ 1719432012941492224