Robust Method to Deduce Cache and TLB Characteristics

Robust Method to Deduce Cache and TLB Characteristics

Bibliographic Details
Main Author: Chandran, Varadharajan
Language:English
Published: The Ohio State University / OhioLINK 2011
Subjects:
Computer Engineering
Computer Science
Cache
TLB
Translation Lookaside Buffer
Hardware parameters
Hit time
Miss Penalty
Online Access:http://rave.ohiolink.edu/etdc/view?acc_num=osu1308256764
id ndltd-OhioLink-oai-etd.ohiolink.edu-osu1308256764
record_format oai_dc
spelling ndltd-OhioLink-oai-etd.ohiolink.edu-osu13082567642021-08-03T06:03:15Z Robust Method to Deduce Cache and TLB Characteristics Chandran, Varadharajan Computer Engineering Computer Science Cache TLB Translation Lookaside Buffer Hardware parameters Hit time Miss Penalty <p>Modern compilers of self-optimizing computing systems require the values of hardware parameters such as the capacity of cache and number of entries in translation lookaside buffer (TLB). Additional information such as the cache block size and page size along with the Hit Time and Miss Penalty of these hardware entities are needed to apply static and dynamic compiler optimization techniques.</p><p>Currently, no tool or approach is robust enough to provide accurate information regarding the underlying hardware. They fail when encoutering multiple levels of cache and TLB present in current generation of processors. </p><p>In this Thesis, we describe a staggered and robust approach to first detecting the hardware entities and their sizes and then disambiguating between the entities by deducing their block sizes. We describe the novel algorithms for measurement of the hardware parameters and the mathematical intuition behind the disambiguation. Experimental evaluations of this technique on traditional workstations, laptops and servers show that our approach produces more accurate and complete results than existing tools.</p> 2011-09-12 English text The Ohio State University / OhioLINK http://rave.ohiolink.edu/etdc/view?acc_num=osu1308256764 http://rave.ohiolink.edu/etdc/view?acc_num=osu1308256764 unrestricted This thesis or dissertation is protected by copyright: all rights reserved. It may not be copied or redistributed beyond the terms of applicable copyright laws.
collection NDLTD
language English
sources NDLTD
topic Computer Engineering
Computer Science
Cache
TLB
Translation Lookaside Buffer
Hardware parameters
Hit time
Miss Penalty
spellingShingle Computer Engineering
Computer Science
Cache
TLB
Translation Lookaside Buffer
Hardware parameters
Hit time
Miss Penalty
Chandran, Varadharajan
Robust Method to Deduce Cache and TLB Characteristics
author Chandran, Varadharajan
author_facet Chandran, Varadharajan
author_sort Chandran, Varadharajan
title Robust Method to Deduce Cache and TLB Characteristics
title_short Robust Method to Deduce Cache and TLB Characteristics
title_full Robust Method to Deduce Cache and TLB Characteristics
title_fullStr Robust Method to Deduce Cache and TLB Characteristics
title_full_unstemmed Robust Method to Deduce Cache and TLB Characteristics
title_sort robust method to deduce cache and tlb characteristics
publisher The Ohio State University / OhioLINK
publishDate 2011
url http://rave.ohiolink.edu/etdc/view?acc_num=osu1308256764
work_keys_str_mv AT chandranvaradharajan robustmethodtodeducecacheandtlbcharacteristics
_version_ 1719430100211990528

Similar Items