Implementation of Hopfield Neural Network Using Double Gate MOSFET
Main Author: | Borundiya, Amit Parasmal |
---|---|
Language: | English |
Published: |
Ohio University / OhioLINK
2008
|
Subjects: | |
Online Access: | http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1204910134 |
Similar Items
-
Compact Modeling Of Asymmetric/Independent Double Gate MOSFET
by: Srivatsava, J
Published: (2014) -
Reconfigurable Threshold Logic Gates Implemented in Nanoscale Double-Gate MOSFETs
by: Ting, Darwin Ta-Yueh
Published: (2008) -
Numerical Simulation of Nanoscale Double-Gate MOSFETs
by: R. Stenzel, et al.
Published: (2006-01-01) -
Simulation Study of Device Characteristics and Short Channel Effects of Nanoscale Germanium Channel Double-Gate MOSFETs
by: Gangadharan, Divya
Published: (2008) -
Digital and Analog Applications of Double Gate Mosfets
by: Varadharajan, Swetha
Published: (2005)