Implementation of Hopfield Neural Network Using Double Gate MOSFET

Implementation of Hopfield Neural Network Using Double Gate MOSFET

Bibliographic Details
Main Author: Borundiya, Amit Parasmal
Language:English
Published: Ohio University / OhioLINK 2008
Subjects:
Electrical Engineering
Hysteresis Hopfield Neural Network using double gate MOSFET
double gate mosfet neural network
N-Queen with double gate MOSFET
Online Access:http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1204910134
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spelling ndltd-OhioLink-oai-etd.ohiolink.edu-ohiou12049101342021-08-03T05:45:41Z Implementation of Hopfield Neural Network Using Double Gate MOSFET Borundiya, Amit Parasmal Electrical Engineering Hysteresis Hopfield Neural Network using double gate MOSFET double gate mosfet neural network N-Queen with double gate MOSFET Hopfield Neural Network has been used to solve the constraints satisfaction problems. To make these networks solve problem in real time, independent of the size, would require building a massively parallel structure. A CMOS circuit can be used to construct such network to find the solution. Current CMOS technology is reaching its physical limitation in deep submicron regime and new devices are explored which can provide scalability in accordance to Moore's; Law. To further increase the network capacity double gate transistors can be used. Double gate MOSFET model of the hysteresis neuron proposed in this thesis utilizes 8 transistors as compared to 60 transistors needed with an operational amplifier's; model. This structure not only reduces the count of transistors by 86% but also demonstrates that larger circuits of double gate MOSFETs can be built, bolstering the faith in double gate MOSFET devices as a possible substitute of CMOS devices in a near future. 2008-04-25 English text Ohio University / OhioLINK http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1204910134 http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1204910134 unrestricted This thesis or dissertation is protected by copyright: all rights reserved. It may not be copied or redistributed beyond the terms of applicable copyright laws.
collection NDLTD
language English
sources NDLTD
topic Electrical Engineering
Hysteresis Hopfield Neural Network using double gate MOSFET
double gate mosfet neural network
N-Queen with double gate MOSFET
spellingShingle Electrical Engineering
Hysteresis Hopfield Neural Network using double gate MOSFET
double gate mosfet neural network
N-Queen with double gate MOSFET
Borundiya, Amit Parasmal
Implementation of Hopfield Neural Network Using Double Gate MOSFET
author Borundiya, Amit Parasmal
author_facet Borundiya, Amit Parasmal
author_sort Borundiya, Amit Parasmal
title Implementation of Hopfield Neural Network Using Double Gate MOSFET
title_short Implementation of Hopfield Neural Network Using Double Gate MOSFET
title_full Implementation of Hopfield Neural Network Using Double Gate MOSFET
title_fullStr Implementation of Hopfield Neural Network Using Double Gate MOSFET
title_full_unstemmed Implementation of Hopfield Neural Network Using Double Gate MOSFET
title_sort implementation of hopfield neural network using double gate mosfet
publisher Ohio University / OhioLINK
publishDate 2008
url http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1204910134
work_keys_str_mv AT borundiyaamitparasmal implementationofhopfieldneuralnetworkusingdoublegatemosfet
_version_ 1719424786746048512

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